PeakRDL-etana
  • Introduction
  • Register Block Architecture
  • Hardware Interface
  • Template Generation
  • Hardware Interface Reports
  • Configuring PeakRDL-etana
  • Command Line Options
  • Testing
  • Known Issues & Limitations
  • Licensing
  • Exporter API

CPU Interfaces

  • Introduction
  • AMBA APB
  • AMBA AHB
  • AMBA AXI4-Lite
  • Avalon Memory-Mapped (Avalon-MM)
  • Open Bus Interface (OBI)
  • Wishbone Bus
  • CPUIF Passthrough
  • Internal CPUIF Protocol
  • Customizing the CPU interface

SystemRDL Properties

  • Field Properties
  • Register Properties
  • Addrmap/Regfile Properties
  • Addrmap Properties
  • Signal Properties
  • RHS Property References

Other SystemRDL Features

  • External Components

Extended Properties

  • Introduction
  • Read-buffered Registers
  • Write-buffered Registers
  • Read/Write-specific swacc
  • Vectorized Register Interface
PeakRDL-etana
  • Search

© Copyright 2026, Dave Keeshan (based on PeakRDL-regblock by Alex Mykyta).

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